477-2286-001 — Technical Data Sheet

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— · COMPONENT

WHAT YOU NEED TO KNOW

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PRODUCT OVERVIEW

The MICROCIRCUIT,MEMORY is a the manufacturer memory module engineered for enterprise server and workstation platforms requiring validated, high-reliability memory. Key specifications include body_width: 0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM IN, body_height: 0.064 INCHES MINIMUM AND 0.100 INCHES MAXIMUM IN, body_length: 0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM IN, features_provided: PROGRAMMABLE AND MONOLITHIC AND BIPOLAR, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC. This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-279-0147, indicating validated use in U.S.

government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels. Verify compatibility with your specific system configuration before ordering.

WHERE IT FITS

477-2286-001

NSN: 5962-01-279-0147
FSC: 5962
CAGE: 94756 — THE BOEING COMPANY DIV LEGACY BOEING HB1 (USA)

SPECIFICATIONS

body_width	0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM IN
body_height	0.064 INCHES MINIMUM AND 0.100 INCHES MAXIMUM IN
body_length	0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM IN
features_provided	PROGRAMMABLE AND MONOLITHIC AND BIPOLAR
output_logic_form	TRANSISTOR-TRANSISTOR LOGIC
inclosure_material	CERAMIC
memory_device_type	PAL
storage_temp_range	-65.0 TO 150.0 CELSIUS DEGC
test_data_document	96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.).
operating_temp_range	-55.0 TO 125.0 CELSIUS DEGC
input_circuit_pattern	16 INPUT
inclosure_configuration	LEADLESS FLAT PACK
NSN	5962-01-279-0147

COMPONENT DIAGRAM

KEY FEATURES

•

INCLOSURE MATERIAL: CERAMIC

•

FEATURES PROVIDED: PROGRAMMABLE AND MONOLITHIC AND BIPOLAR

•

INCLOSURE CONFIGURATION: LEADLESS FLAT PACK

•

CASE OUTLINE SOURCE AND DESIGNATOR: C-2 MIL-M-38510

•

BODY LENGTH: 0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM IN

•

OUTPUT LOGIC FORM: TRANSISTOR-TRANSISTOR LOGIC

•

TERMINAL SURFACE TREATMENT: SOLDER

•

TIME RATING PER CHACTERISTIC: 75.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 75.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS

TYPICAL APPLICATIONS

Server memory expansion for virtualization workloads
Database performance optimization (in-memory computing)
VDI and remote desktop session hosting
High-performance computing (HPC) clusters
Mail server and collaboration platform scaling
Application server tier expansion

TECHNICAL CHARACTERISTICS (FLIS)

INCLOSURE MATERIAL	CERAMIC
FEATURES PROVIDED	PROGRAMMABLE AND MONOLITHIC AND BIPOLAR
INCLOSURE CONFIGURATION	LEADLESS FLAT PACK
CASE OUTLINE SOURCE AND DESIGNATOR	C-2 MIL-M-38510
BODY LENGTH	0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM IN
OUTPUT LOGIC FORM	TRANSISTOR-TRANSISTOR LOGIC
TERMINAL SURFACE TREATMENT	SOLDER
TIME RATING PER CHACTERISTIC	75.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 75.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS
MEMORY DEVICE TYPE	PAL
INPUT CIRCUIT PATTERN	16 INPUT

VERIFIED SUBSTITUTES & CROSS-REFERENCES 25

850CInterchangeable