The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.235 INCHES MINIMUM AND 0.265 INCHES MAXIMUM IN, body_height: 0.050 INCHES MINIMUM AND 0.080 INCHES MAXIMUM IN, body_length: 0.337 INCHES MINIMUM AND 0.350 INCHES MAXIMUM IN, overall_height: 0.330 INCHES NOMINAL IN, special_features: WITH COMMON CLOCK, features_provided: HERMETICALLY SEALED AND BURN IN AND W/TOTEM POLE OUTPUT AND BIPOLAR AND HIGH PERFORMANCE AND POSITIVE OUTPUTS. This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-00-137-5060, indicating validated use in U.S.
government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels. Verify compatibility with your specific system configuration before ordering.
| body_width | 0.235 INCHES MINIMUM AND 0.265 INCHES MAXIMUM IN |
| body_height | 0.050 INCHES MINIMUM AND 0.080 INCHES MAXIMUM IN |
| body_length | 0.337 INCHES MINIMUM AND 0.350 INCHES MAXIMUM IN |
| overall_height | 0.330 INCHES NOMINAL IN |
| special_features | WITH COMMON CLOCK |
| features_provided | HERMETICALLY SEALED AND BURN IN AND W/TOTEM POLE OUTPUT AND BIPOLAR AND HIGH PERFORMANCE AND POSITIVE OUTPUTS |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| precious_material | GOLD |
| inclosure_material | CERAMIC AND GLASS |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| test_data_document | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| NSN | 5962-00-137-5060 |
| PRECIOUS MATERIAL | GOLD |
| DESIGN FUNCTION AND QUANTITY | 2 GATE, AND-OR INVERT |
| INCLOSURE MATERIAL | GLASS AND METAL |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND LOW POWER AND W/TOTEM POLE OUTPUT |
| INPUT CIRCUIT PATTERN | DUAL 2 WIDE 2-3 INPUT |
| PRECIOUS MATERIAL AND LOCATION | TERMINALS GOLD AND BODY GOLD |
| TEST DATA DOCUMENT | 13499-351-7365 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |