The MICROCIRCUIT,MEMORY is a the manufacturer memory module engineered for enterprise server and workstation platforms requiring validated, high-reliability memory. Key specifications include body_width: 0.245 INCHES MINIMUM AND 0.285 INCHES MAXIMUM IN, body_height: 0.205 INCHES NOMINAL IN, body_length: 1.170 INCHES MINIMUM AND 1.285 INCHES MAXIMUM IN, features_provided: PROGRAMMABLE AND BIPOLAR AND ELECTROSTATIC SENSITIVE AND W/ENABLE AND EDGE TRIGGERED, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-292-8295, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.245 INCHES MINIMUM AND 0.285 INCHES MAXIMUM IN |
| body_height | 0.205 INCHES NOMINAL IN |
| body_length | 1.170 INCHES MINIMUM AND 1.285 INCHES MAXIMUM IN |
| features_provided | PROGRAMMABLE AND BIPOLAR AND ELECTROSTATIC SENSITIVE AND W/ENABLE AND EDGE TRIGGERED |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| memory_device_type | ROM |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| test_data_document | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | 16 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| NSN | 5962-01-292-8295 |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| TERMINAL TYPE AND QUANTITY | 24 PRINTED CIRCUIT |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 7.0 VOLTS MAXIMUM POWER SOURCE |
| MEMORY DEVICE TYPE | ROM |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TIME RATING PER CHACTERISTIC | 30.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 35.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| INPUT CIRCUIT PATTERN | 16 INPUT |