The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN, body_height: 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN, body_length: 0.896 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND MONOLITHIC AND W/DECODED OUTPUT AND POSITIVE OUTPUTS, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC AND GLASS. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-039-0012, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| body_height | 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN |
| body_length | 0.896 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND MONOLITHIC AND W/DECODED OUTPUT AND POSITIVE OUTPUTS |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC AND GLASS |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | 4 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| terminal_surface_treatment | SOLDER |
| terminal_type_and_quantity | 16 PRINTED CIRCUIT |
| NSN | 5962-01-039-0012 |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| BODY WIDTH | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| TERMINAL SURFACE TREATMENT | SOLDER |
| MAXIMUM POWER DISSIPATION RATING | 226.0 MILLIWATTS |
| SPECIFICATION/STANDARD DATA | 81349-MIL-M-38510/10 GOVERNMENT SPECIFICATION |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| TIME RATING PER CHACTERISTIC | 5.00 NANOSECONDS MINIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 46.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 5.00 NANOSECONDS MINIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT AND 46.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| INPUT CIRCUIT PATTERN | 4 INPUT |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |