The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN, body_height: 0.180 INCHES MAXIMUM IN, body_length: 0.930 INCHES MINIMUM AND 0.975 INCHES MAXIMUM IN, overall_height: 0.330 INCHES NOMINAL IN, features_provided: MONOLITHIC AND LOW POWER AND SCHOTTKY AND 3-STATE OUTPUT AND W/CLOCK AND W/ENABLE, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC. This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-102-3114, indicating validated use in U.S.
government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels. Verify compatibility with your specific system configuration before ordering.
| body_width | 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN |
| body_height | 0.180 INCHES MAXIMUM IN |
| body_length | 0.930 INCHES MINIMUM AND 0.975 INCHES MAXIMUM IN |
| overall_height | 0.330 INCHES NOMINAL IN |
| special_features | NUCLEAR HARDNESS CRITICAL; NO DRAWING TO DETERMINE IF ISC CODE 1 ITEM SHOULD ALSO BE NUCLEAR HARDNESS. CAN'T CHANGE CRITICALITY CODE TO REFLECT NUCLEAR HARDNESS |
| features_provided | MONOLITHIC AND LOW POWER AND SCHOTTKY AND 3-STATE OUTPUT AND W/CLOCK AND W/ENABLE |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | +0.0 TO 70.0 CELSIUS DEGC |
| input_circuit_pattern | 10 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| NSN | 5962-01-102-3114 |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| DESIGN FUNCTION AND QUANTITY | 8 FLIP-FLOP, D-TYPE |
| INCLOSURE MATERIAL | CERAMIC |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND LOW POWER AND SCHOTTKY AND W/ENABLE AND 3-STATE OUTPUT |
| SPECIAL FEATURES | NUCLEAR HARDNESS CRITICAL; NO DRAWING TO DETERMINE IF ISC CODE 1 ITEM SHOULD ALSO BE NUCLEAR HARDNESS. CAN'T CHANGE CRITICALITY CODE TO REFLECT NUCLEAR HARDNESS |
| BODY WIDTH | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| TEST DATA DOCUMENT | 81349-MIL-M-38510 SPECIFICATION (INCLUDES ENGINEERING TYPE BULLETINS, BROCHURES,ETC., THAT REFLECT SPECIFICATION TYPE DATA IN SPECIFICATION FORMAT; EXCLUDES COMMERCIAL CATALOGS, INDUSTRY DIRECTORIES, AND SIMILAR TRADE PUBLICATIONS, REFLECTING GENERAL TYPE DATA ON CERTAIN ENVIRONMENTAL AND PERFORMANCE REQUIREMENTS AND TEST CONDITIONS THAT ARE SHOWN AS "TYPICAL", "AVERAGE", "NOMINAL", ETC.). |
| TERMINAL SURFACE TREATMENT | SOLDER |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |