The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN, body_height: 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM IN, body_length: 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM IN, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC AND GLASS, storage_temp_range: -65.0 TO 150.0 CELSIUS DEGC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-00-603-9772, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN |
| body_height | 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM IN |
| body_length | 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND COMPLEMENTARY OUTPUTS AND EDGE TRIGGERED AND SYNCHRONOUS AND W/CLEAR AND W/ENABLE |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC AND GLASS |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| test_data_document | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | 9 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| terminal_surface_treatment | SOLDER |
| NSN | 5962-00-603-9772 |
| INCLOSURE MATERIAL | CERAMIC |
| TERMINAL SURFACE TREATMENT | SOLDER |
| BODY HEIGHT | 0.180 INCHES NOMINAL IN |
| BODY LENGTH | 0.785 INCHES NOMINAL IN |
| DESIGN FUNCTION AND QUANTITY | 1 SHIFT REGISTER, PARALLEL AND/OR SERIES OPERATION |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| BODY WIDTH | 0.250 INCHES NOMINAL IN |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| INPUT CIRCUIT PATTERN | 9 INPUT |
| FEATURES PROVIDED | HERMETICALLY SEALED |