The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN, body_height: 0.180 INCHES MAXIMUM IN, body_length: 0.785 INCHES MAXIMUM IN, features_provided: ELECTROSTATIC SENSITIVE AND BURN IN, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC. This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-00-096-3712, indicating validated use in U.S.
government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels. Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN |
| body_height | 0.180 INCHES MAXIMUM IN |
| body_length | 0.785 INCHES MAXIMUM IN |
| features_provided | ELECTROSTATIC SENSITIVE AND BURN IN |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| test_data_document | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | 9 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| terminal_surface_treatment | SOLDER |
| NSN | 5962-00-096-3712 |
| BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM IN |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| BODY LENGTH | 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN |
| TERMINAL TYPE AND QUANTITY | 14 PRINTED CIRCUIT |
| DESIGN FUNCTION AND QUANTITY | 1 ADDER, FULL, BINARY |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TIME RATING PER CHACTERISTIC | 70.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 80.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| INPUT CIRCUIT PATTERN | 9 INPUT |