SN19334: MICROCIRCUIT,DIGITAL.
The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.140 INCHES MINIMUM AND 0.150 INCHES MAXIMUM IN, body_height: 0.035 INCHES MINIMUM AND 0.050 INCHES MAXIMUM IN, body_length: 0.250 INCHES MINIMUM AND 0.260 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND HIGH SPEED AND EDGE TRIGGERED AND PRESETTABLE AND W/CLEAR, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, precious_material: GOLD. This part is cataloged in the U.S.
Government catalog under NSN 5962-00-341-2008, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.140 INCHES MINIMUM AND 0.150 INCHES MAXIMUM IN |
| body_height | 0.035 INCHES MINIMUM AND 0.050 INCHES MAXIMUM IN |
| body_length | 0.250 INCHES MINIMUM AND 0.260 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND HIGH SPEED AND EDGE TRIGGERED AND PRESETTABLE AND W/CLEAR |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| precious_material | GOLD |
| inclosure_material | GLASS AND METAL |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | DUAL 4 INPUT |
| inclosure_configuration | FLAT PACK |
| terminal_surface_treatment | GOLD |
| NSN | 5962-00-341-2008 |
| INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
| INCLOSURE MATERIAL | GLASS AND METAL |
| TERMINAL SURFACE TREATMENT | GOLD |
| PRECIOUS MATERIAL | GOLD |
| DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, CLOCKED AND 2 FLIP-FLOP, D-TYPE |
| BODY WIDTH | 0.140 INCHES MINIMUM AND 0.150 INCHES MAXIMUM IN |
| BODY HEIGHT | 0.035 INCHES MINIMUM AND 0.050 INCHES MAXIMUM IN |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND HIGH SPEED AND EDGE TRIGGERED AND PRESETTABLE AND W/CLEAR |
| INCLOSURE CONFIGURATION | FLAT PACK |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |