The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN, body_height: 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM IN, body_length: 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND MONOLITHIC AND W/BUFFERED OUTPUT AND W/CLOCK AND RELIABILITY SCREENING REQUIRED, output_logic_form: DIODE-TRANSISTOR LOGIC, inclosure_material: CERAMIC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-00-494-1424, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN |
| body_height | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM IN |
| body_length | 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND MONOLITHIC AND W/BUFFERED OUTPUT AND W/CLOCK AND RELIABILITY SCREENING REQUIRED |
| output_logic_form | DIODE-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | DUAL 4 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| design_function_and_quantity | 2 FLIP-FLOP, J-K |
| time_rating_per_chacteristic | 75.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 75.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| NSN | 5962-00-494-1424 |
| BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM IN |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND W/BUFFERED OUTPUT AND W/CLOCK AND RELIABILITY SCREENING REQUIRED |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS DEGC |
| BODY LENGTH | 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN |
| OUTPUT LOGIC FORM | DIODE-TRANSISTOR LOGIC |
| INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
| DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, J-K |
| INCLOSURE MATERIAL | CERAMIC |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |