The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN, body_height: 0.185 INCHES MAXIMUM IN, body_length: 0.640 INCHES MINIMUM AND 0.790 INCHES MAXIMUM IN, features_provided: W/OPEN COLLECTOR AND POSITIVE OUTPUTS AND HIGH PERFORMANCE AND LOW IMPEDANCE, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: PLASTIC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-110-2820, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| body_height | 0.185 INCHES MAXIMUM IN |
| body_length | 0.640 INCHES MINIMUM AND 0.790 INCHES MAXIMUM IN |
| features_provided | W/OPEN COLLECTOR AND POSITIVE OUTPUTS AND HIGH PERFORMANCE AND LOW IMPEDANCE |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | PLASTIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | +0.0 TO 70.0 CELSIUS DEGC |
| input_circuit_pattern | QUAD 2 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| design_function_and_quantity | 4 GATE, NAND |
| time_rating_per_chacteristic | 45.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| NSN | 5962-01-110-2820 |
| INCLOSURE MATERIAL | PLASTIC |
| BODY HEIGHT | 0.185 INCHES MAXIMUM IN |
| OPERATING TEMP RANGE | +0.0 TO 70.0 CELSIUS DEGC |
| BODY LENGTH | 0.640 INCHES MINIMUM AND 0.790 INCHES MAXIMUM IN |
| FEATURES PROVIDED | W/OPEN COLLECTOR AND POSITIVE OUTPUTS AND HIGH PERFORMANCE AND LOW IMPEDANCE |
| BODY WIDTH | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| TIME RATING PER CHACTERISTIC | 45.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| DESIGN FUNCTION AND QUANTITY | 4 GATE, NAND |