The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.260 INCHES MAXIMUM IN, body_height: 0.030 INCHES MINIMUM AND 0.060 INCHES MAXIMUM IN, body_length: 0.260 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-00-044-9295, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.260 INCHES MAXIMUM IN |
| body_height | 0.030 INCHES MINIMUM AND 0.060 INCHES MAXIMUM IN |
| body_length | 0.260 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| storage_temp_range | -65.0 TO 200.0 CELSIUS DEGC |
| operating_temp_range | +0.0 TO 75.0 CELSIUS DEGC |
| input_circuit_pattern | 2 INPUT AND 8 INPUT |
| inclosure_configuration | FLAT PACK |
| terminal_surface_treatment | SOLDER |
| terminal_type_and_quantity | 14 FLAT LEADS |
| NSN | 5962-00-044-9295 |
| MAXIMUM POWER DISSIPATION RATING | 15.0 MILLIWATTS |
| TIME RATING PER CHACTERISTIC | 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS |
| BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.060 INCHES MAXIMUM IN |
| TEST DATA DOCUMENT | 05869-717310-5 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| INCLOSURE MATERIAL | CERAMIC |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| DESIGN FUNCTION AND QUANTITY | 2 GATE, NAND-NOR |
| STORAGE TEMP RANGE | -65.0 TO 200.0 CELSIUS DEGC |
| TERMINAL SURFACE TREATMENT | SOLDER |