The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN, body_height: 0.185 INCHES MAXIMUM IN, body_length: 0.740 INCHES MINIMUM AND 0.870 INCHES MAXIMUM IN, overall_height: 0.400 INCHES MAXIMUM IN, overall_length: 0.840 INCHES MAXIMUM IN, memory_capacity: UNKNOWN. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-033-2241, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| body_height | 0.185 INCHES MAXIMUM IN |
| body_length | 0.740 INCHES MINIMUM AND 0.870 INCHES MAXIMUM IN |
| overall_height | 0.400 INCHES MAXIMUM IN |
| overall_length | 0.840 INCHES MAXIMUM IN |
| memory_capacity | UNKNOWN |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| memory_device_type | ROM |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | 10 INPUT |
| NSN | 5962-01-033-2241 |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| END ITEM IDENTIFICATION | BUILDING BLOCK 57 FSCM 30003 |
| TEST DATA DOCUMENT | 06424-10560 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 60.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT NS |
| PRECIOUS MATERIAL AND LOCATION | TERMINALS GOLD |
| BODY WIDTH | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN |
| BODY HEIGHT | 0.200 INCHES MAXIMUM IN |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| INPUT CIRCUIT PATTERN | 10 INPUT |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |