RELEASE N0. 6342: TRANSISTOR.
The TRANSISTOR is a the manufacturer industrial component. Key specifications include overall_height: 0.250 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN, overall_length: 0.830 INCHES MAXIMUM IN, mounting_method: UNTHREADED HOLE(S), special_features: JUNCTION PATTERN ARRANGEMENT: NPN, features_provided: HERMETICALLY SEALED CASE, internal_configuration: JUNCTION CONTACT. This part is cataloged in the U.S.
Government catalog under NSN 5961-01-013-9350, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| overall_height | 0.250 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN |
| overall_length | 0.830 INCHES MAXIMUM IN |
| mounting_method | UNTHREADED HOLE(S) |
| special_features | JUNCTION PATTERN ARRANGEMENT: NPN |
| features_provided | HERMETICALLY SEALED CASE |
| internal_configuration | JUNCTION CONTACT |
| semiconductor_material | SILICON |
| mounting_facility_quantity | 2 |
| terminal_type_and_quantity | 2 PIN |
| power_rating_per_characteristic | 100.0 WATTS MAXIMUM TOTAL DEVICE DISSIPATION |
| current_rating_per_characteristic | 8.00 AMPERES MAXIMUM COLLECTOR CURRENT, DC AND 120.00 MILLIAMPERES MAXIMUM BASE CURRENT, DC |
| voltage_rating_in_volts_per_characteristic | 80.0 MAXIMUM COLLECTOR TO EMITTER VOLTAGE/STATIC/BASE OPEN AND 5.0 MAXIMUM EMITTER TO BASE VOLTAGE, STATIC, COLLECTOR OPEN AND 80.0 MAXIMUM COLLECTOR TO BASE VOLTAGE/STATIC/EMITTER OPEN |
| NSN | 5961-01-013-9350 |
| OVERALL HEIGHT | 0.250 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN |
| VOLTAGE RATING IN VOLTS PER CHARACTERISTIC | 80.0 MAXIMUM COLLECTOR TO EMITTER VOLTAGE/STATIC/BASE OPEN AND 5.0 MAXIMUM EMITTER TO BASE VOLTAGE, STATIC, COLLECTOR OPEN AND 80.0 MAXIMUM COLLECTOR TO BASE VOLTAGE/STATIC/EMITTER OPEN |
| MAXIMUM OPERATING TEMP PER MEASUREMENT POINT | 200.0 CELSIUS JUNCTION DEGC |
| MOUNTING FACILITY QUANTITY | 2 |
| JOINT ELECTRONIC DEVICE ENGINEERING COUNCIL/JEDEC/CASE OUTLINE DESIGNATION | TO-3 |
| MOUNTING METHOD | UNTHREADED HOLE(S) |
| SEMICONDUCTOR MATERIAL | SILICON |
| OVERALL LENGTH | 0.830 INCHES MAXIMUM IN |
| INTERNAL CONFIGURATION | JUNCTION CONTACT |
| FEATURES PROVIDED | HERMETICALLY SEALED CASE |