The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.235 INCHES MINIMUM AND 0.260 INCHES MAXIMUM IN, body_height: 0.045 INCHES MINIMUM AND 0.085 INCHES MAXIMUM IN, body_length: 0.390 INCHES MAXIMUM IN, features_provided: MONOLITHIC AND W/CLEAR AND W/CLOCK, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC. This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-283-7123, indicating validated use in U.S.
government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels. Verify compatibility with your specific system configuration before ordering.
| body_width | 0.235 INCHES MINIMUM AND 0.260 INCHES MAXIMUM IN |
| body_height | 0.045 INCHES MINIMUM AND 0.085 INCHES MAXIMUM IN |
| body_length | 0.390 INCHES MAXIMUM IN |
| features_provided | MONOLITHIC AND W/CLEAR AND W/CLOCK |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | DUAL 4 INPUT |
| inclosure_configuration | FLAT PACK |
| terminal_surface_treatment | SOLDER |
| terminal_type_and_quantity | 14 FLAT LEADS |
| NSN | 5962-01-283-7123 |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, J-K, MASTER SLAVE |
| INCLOSURE CONFIGURATION | FLAT PACK |
| MAXIMUM POWER DISSIPATION RATING | 110.0 MILLIWATTS |
| TIME RATING PER CHACTERISTIC | 39.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| BODY LENGTH | 0.390 INCHES MAXIMUM IN |
| TERMINAL SURFACE TREATMENT | SOLDER |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| INCLOSURE MATERIAL | CERAMIC |