MTLD112: MICROCIRCUIT,DIGITAL.
The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN, body_height: 0.150 INCHES MINIMUM IN, body_length: 0.785 INCHES MAXIMUM IN, special_features: WITH N- AND P-CHANNEL ENHANCEMENT TRANSISTORS, features_provided: MONOLITHIC AND PRESETTABLE AND W/CLOCK AND LOW POWER, output_logic_form: COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC. This part is cataloged in the U.S.
Government catalog under NSN 5962-01-474-9787, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| body_height | 0.150 INCHES MINIMUM IN |
| body_length | 0.785 INCHES MAXIMUM IN |
| special_features | WITH N- AND P-CHANNEL ENHANCEMENT TRANSISTORS |
| features_provided | MONOLITHIC AND PRESETTABLE AND W/CLOCK AND LOW POWER |
| output_logic_form | COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| test_data_document | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| end_item_identification | 1430014465321 |
| inclosure_configuration | DUAL-IN-LINE |
| terminal_surface_treatment | SOLDER |
| NSN | 5962-01-474-9787 |
| TERMINAL SURFACE TREATMENT | SOLDER |
| DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, J-K |
| BODY WIDTH | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| BODY HEIGHT | 0.150 INCHES MINIMUM IN |
| FEATURES PROVIDED | MONOLITHIC AND PRESETTABLE AND W/CLOCK AND LOW POWER |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| BODY LENGTH | 0.785 INCHES MAXIMUM IN |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS DEGC |
| OUTPUT LOGIC FORM | COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC |
| SPECIAL FEATURES | WITH N- AND P-CHANNEL ENHANCEMENT TRANSISTORS |