The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN, body_height: 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN, body_length: 0.896 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND PROGRAMMABLE AND PROGRAMMED AND W/ENABLE AND 3-STATE OUTPUT, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-055-9547, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| body_height | 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN |
| body_length | 0.896 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND PROGRAMMABLE AND PROGRAMMED AND W/ENABLE AND 3-STATE OUTPUT |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | 10 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| time_rating_per_chacteristic | 85.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 85.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| maximum_power_dissipation_rating | 715.0 MILLIWATTS |
| NSN | 5962-01-055-9547 |
| INPUT CIRCUIT PATTERN | 10 INPUT |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| TIME RATING PER CHACTERISTIC | 85.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 85.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| TEST DATA DOCUMENT | 49956-952369 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| MAXIMUM POWER DISSIPATION RATING | 715.0 MILLIWATTS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| BODY LENGTH | 0.896 INCHES MAXIMUM IN |
| BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN |
| INCLOSURE MATERIAL | CERAMIC |