The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN, body_height: 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN, body_length: 0.840 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND MONOLITHIC AND NEGATIVE OUTPUTS AND POSITIVE OUTPUTS AND W/ENABLE, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC AND GLASS. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-019-6176, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| body_height | 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN |
| body_length | 0.840 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND MONOLITHIC AND NEGATIVE OUTPUTS AND POSITIVE OUTPUTS AND W/ENABLE |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC AND GLASS |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| test_data_document | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | DUAL 3 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| terminal_surface_treatment | SOLDER |
| NSN | 5962-01-019-6176 |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS DEGC |
| BODY HEIGHT | 0.130 INCHES MINIMUM AND 0.160 INCHES MAXIMUM IN |
| BODY LENGTH | 0.750 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN |
| INPUT CIRCUIT PATTERN | 10 INPUT |
| TIME RATING PER CHACTERISTIC | 12.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT NS |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| FEATURES PROVIDED | HERMETICALLY SEALED AND W/DISABLE AND W/ENABLE |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |