The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN, body_height: 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM IN, body_length: 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM IN, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC AND GLASS, storage_temp_range: -65.0 TO 150.0 CELSIUS DEGC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-00-147-4464, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN |
| body_height | 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM IN |
| body_length | 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND MEDIUM POWER AND MEDIUM SPEED AND NEGATIVE EDGE TRIGGERED AND PRESETTABLE AND W/CLEAR AND W/ENABLE |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC AND GLASS |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | +0.0 TO 85.0 CELSIUS DEGC |
| input_circuit_pattern | DUAL 5 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| design_function_and_quantity | 2 FLIP-FLOP, J-K, CLOCKED |
| time_rating_per_chacteristic | 39.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| NSN | 5962-00-147-4464 |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| TIME RATING PER CHACTERISTIC | 39.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS DEGC |
| CASE OUTLINE SOURCE AND DESIGNATOR | -0-001-AG JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| INPUT CIRCUIT PATTERN | DUAL 5 INPUT |
| BODY LENGTH | 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM IN |
| BODY WIDTH | 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN |
| BODY HEIGHT | 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM IN |
| OPERATING TEMP RANGE | +0.0 TO 85.0 CELSIUS DEGC |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |