Name: ARRESTER,ELECTRICAL SURGE
Brand: Unknown
SKU: B2052-615

B2052-615 ✓ Verified by PartsTable

— · COMPONENT

WHAT YOU NEED TO KNOW

Verify manufacturer and server generation compatibility Check if Option PN or Spare PN — same part, different channel

Confirm exact part number — similar PNs may be different parts

PRODUCT OVERVIEW

The ARRESTER,ELECTRICAL SURGE is a the manufacturer industrial component. Key specifications include body_width: 0.285 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN, body_height: 0.145 INCHES MINIMUM AND 0.170 INCHES MAXIMUM IN, body_length: 0.880 INCHES MINIMUM AND 0.900 INCHES MAXIMUM IN, memory_capacity: UNKNOWN, features_provided: BURN IN AND PROGRAMMABLE AND ELECTROSTATIC SENSITIVE AND SCHOTTKY, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC. This product is currently in active production with full OEM support.

This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-157-9900, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.

Verify compatibility with your specific system configuration before ordering.

WHERE IT FITS

B2052-615

NSN: 5962-01-157-9900
FSC: 5962
CAGE: 34371 — RENESAS ELECTRONICS AMERICA INC (USA)

SPECIFICATIONS

body_width	0.285 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN
body_height	0.145 INCHES MINIMUM AND 0.170 INCHES MAXIMUM IN
body_length	0.880 INCHES MINIMUM AND 0.900 INCHES MAXIMUM IN
memory_capacity	UNKNOWN
features_provided	BURN IN AND PROGRAMMABLE AND ELECTROSTATIC SENSITIVE AND SCHOTTKY
output_logic_form	TRANSISTOR-TRANSISTOR LOGIC
inclosure_material	CERAMIC
memory_device_type	ROM
storage_temp_range	-65.0 TO 150.0 CELSIUS DEGC
operating_temp_range	+0.0 TO 70.0 CELSIUS DEGC
input_circuit_pattern	12 INPUT
inclosure_configuration	DUAL-IN-LINE
NSN	5962-01-157-9900

COMPONENT DIAGRAM

KEY FEATURES

•

OUTPUT LOGIC FORM: TRANSISTOR-TRANSISTOR LOGIC

•

BODY WIDTH: 0.285 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN

•

INPUT CIRCUIT PATTERN: 12 INPUT

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TERMINAL SURFACE TREATMENT: SOLDER

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TIME RATING PER CHACTERISTIC: 70.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 70.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS

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MEMORY DEVICE TYPE: ROM

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MEMORY CAPACITY: UNKNOWN

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VOLTAGE RATING AND TYPE PER CHARACTERISTIC: 7.0 VOLTS MAXIMUM POWER SOURCE

TECHNICAL CHARACTERISTICS (FLIS)

OUTPUT LOGIC FORM	TRANSISTOR-TRANSISTOR LOGIC
BODY WIDTH	0.285 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN
INPUT CIRCUIT PATTERN	12 INPUT
TERMINAL SURFACE TREATMENT	SOLDER
TIME RATING PER CHACTERISTIC	70.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 70.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS
MEMORY DEVICE TYPE	ROM
MEMORY CAPACITY	UNKNOWN
VOLTAGE RATING AND TYPE PER CHARACTERISTIC	7.0 VOLTS MAXIMUM POWER SOURCE
TERMINAL TYPE AND QUANTITY	18 PRINTED CIRCUIT
BODY LENGTH	0.880 INCHES MINIMUM AND 0.900 INCHES MAXIMUM IN

VERIFIED SUBSTITUTES & CROSS-REFERENCES 12

B107.5Interchangeable