9S20DMQB — Technical Data Sheet

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— · COMPONENT

WHAT YOU NEED TO KNOW

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PRODUCT OVERVIEW

The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.245 INCHES MINIMUM AND 0.271 INCHES MAXIMUM IN, body_height: 0.185 INCHES NOMINAL IN, body_length: 0.750 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN, overall_height: 0.300 INCHES MINIMUM AND 0.365 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC. This product is currently in active production with full OEM support.

This part is cataloged in the Federal Logistics Information System under NSN 5962-01-057-7050, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.

Verify compatibility with your specific system configuration before ordering.

WHERE IT FITS

9S20DMQB

NSN: 5962-01-057-7050
FSC: 5962
CAGE: 07263 — FAIRCHILD SEMICONDUCTOR CORP (USA)

SPECIFICATIONS

body_width	0.245 INCHES MINIMUM AND 0.271 INCHES MAXIMUM IN
body_height	0.185 INCHES NOMINAL IN
body_length	0.750 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN
overall_height	0.300 INCHES MINIMUM AND 0.365 INCHES MAXIMUM IN
features_provided	HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS
output_logic_form	TRANSISTOR-TRANSISTOR LOGIC
inclosure_material	CERAMIC
storage_temp_range	-65.0 TO 150.0 CELSIUS DEGC
test_data_document	96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.).
operating_temp_range	-55.0 TO 125.0 CELSIUS DEGC
input_circuit_pattern	DUAL 4 INPUT
inclosure_configuration	DUAL-IN-LINE
NSN	5962-01-057-7050

COMPONENT DIAGRAM

KEY FEATURES

•

FEATURES PROVIDED: HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS

•

STORAGE TEMP RANGE: -65.0 TO 150.0 CELSIUS DEGC

•

BODY WIDTH: 0.245 INCHES MINIMUM AND 0.271 INCHES MAXIMUM IN

•

BODY HEIGHT: 0.185 INCHES NOMINAL IN

•

OPERATING TEMP RANGE: -55.0 TO 125.0 CELSIUS DEGC

•

DESIGN FUNCTION AND QUANTITY: 2 GATE, NAND

•

OUTPUT LOGIC FORM: TRANSISTOR-TRANSISTOR LOGIC

•

INPUT CIRCUIT PATTERN: DUAL 4 INPUT

TECHNICAL CHARACTERISTICS

FEATURES PROVIDED	HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS
STORAGE TEMP RANGE	-65.0 TO 150.0 CELSIUS DEGC
BODY WIDTH	0.245 INCHES MINIMUM AND 0.271 INCHES MAXIMUM IN
BODY HEIGHT	0.185 INCHES NOMINAL IN
OPERATING TEMP RANGE	-55.0 TO 125.0 CELSIUS DEGC
DESIGN FUNCTION AND QUANTITY	2 GATE, NAND
OUTPUT LOGIC FORM	TRANSISTOR-TRANSISTOR LOGIC
INPUT CIRCUIT PATTERN	DUAL 4 INPUT
INCLOSURE MATERIAL	CERAMIC
BODY LENGTH	0.750 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN

VERIFIED SUBSTITUTES & CROSS-REFERENCES 10

6304InterchangeableGOVERNMENT REGISTRY