The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN, body_height: 0.200 INCHES NOMINAL IN, body_length: 0.685 INCHES MINIMUM AND 0.850 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND W/TOTEM POLE OUTPUT, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: PLASTIC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-028-6938, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN |
| body_height | 0.200 INCHES NOMINAL IN |
| body_length | 0.685 INCHES MINIMUM AND 0.850 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND W/TOTEM POLE OUTPUT |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | PLASTIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | +0.0 TO 70.0 CELSIUS DEGC |
| input_circuit_pattern | QUAD 2 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| design_function_and_quantity | 4 GATE, NAND BUFFER |
| time_rating_per_chacteristic | 22.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| NSN | 5962-01-028-6938 |
| DESIGN FUNCTION AND QUANTITY | 4 BUFFER, NAND |
| OPERATING TEMP RANGE | +0.0 TO 70.0 CELSIUS DEGC |
| BODY LENGTH | 0.740 INCHES MINIMUM AND 0.770 INCHES MAXIMUM IN |
| TIME RATING PER CHACTERISTIC | 22.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| CASE OUTLINE SOURCE AND DESIGNATOR | TO-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| FEATURES PROVIDED | MONOLITHIC AND POSITIVE OUTPUTS |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS DEGC |
| INCLOSURE MATERIAL | PLASTIC |