The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.310 INCHES MAXIMUM IN, body_height: 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN, body_length: 0.786 INCHES MINIMUM AND 0.806 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND BURN IN AND W/CLOCK AND W/CLEAR AND W/PRESET, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-320-1676, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.310 INCHES MAXIMUM IN |
| body_height | 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN |
| body_length | 0.786 INCHES MINIMUM AND 0.806 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND BURN IN AND W/CLOCK AND W/CLEAR AND W/PRESET |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| storage_temp_range | -65.0 TO 125.0 CELSIUS DEGC |
| test_data_document | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | DUAL 4 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| terminal_surface_treatment | SOLDER |
| NSN | 5962-01-320-1676 |
| BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN |
| FEATURES PROVIDED | HERMETICALLY SEALED AND BURN IN AND W/CLOCK AND W/CLEAR AND W/PRESET |
| DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, D-TYPE, CLOCKED |
| CASE OUTLINE SOURCE AND DESIGNATOR | TO-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 7.0 VOLTS MAXIMUM POWER SOURCE |
| TIME RATING PER CHACTERISTIC | 25.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 40.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| INCLOSURE MATERIAL | CERAMIC |
| TERMINAL SURFACE TREATMENT | SOLDER |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |