The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN, body_height: 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN, body_length: 0.785 INCHES MAXIMUM IN, overall_height: 0.400 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND BURN IN AND MONOLITHIC AND POSITIVE OUTPUTS, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-096-7873, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| body_height | 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN |
| body_length | 0.785 INCHES MAXIMUM IN |
| overall_height | 0.400 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND BURN IN AND MONOLITHIC AND POSITIVE OUTPUTS |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| test_data_document | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | QUAD 2 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| NSN | 5962-01-096-7873 |
| INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| FEATURES PROVIDED | HERMETICALLY SEALED AND BURN IN AND MONOLITHIC AND POSITIVE OUTPUTS |
| OVERALL HEIGHT | 0.400 INCHES MAXIMUM IN |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| BODY WIDTH | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| TIME RATING PER CHACTERISTIC | 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN |