395059: MICROCIRCUIT,DIGITAL.
The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM IN, body_height: 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM IN, body_length: 0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM IN, output_logic_form: DIODE-TRANSISTOR LOGIC, precious_material: GOLD, inclosure_material: CERAMIC AND GLASS. This part is cataloged in the U.S.
Government catalog under NSN 5962-00-824-4643, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM IN |
| body_height | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM IN |
| body_length | 0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM IN |
| features_provided | MONOLITHIC AND HERMETICALLY SEALED AND AC COUPLED AND MEDIUM SPEED AND MEDIUM POWER AND POSITIVE OUTPUTS AND W/CLEAR AND NEGATIVE EDGE TRIGGERED AND EDGE TRIGGERED |
| output_logic_form | DIODE-TRANSISTOR LOGIC |
| precious_material | GOLD |
| inclosure_material | CERAMIC AND GLASS |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | +0.0 TO 75.0 CELSIUS DEGC |
| input_circuit_pattern | 6 INPUT |
| inclosure_configuration | FLAT PACK |
| terminal_surface_treatment | GOLD |
| NSN | 5962-00-824-4643 |
| INPUT CIRCUIT PATTERN | 6 INPUT |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| TERMINAL SURFACE TREATMENT | GOLD |
| PRECIOUS MATERIAL | GOLD |
| DESIGN FUNCTION AND QUANTITY | 1 FLIP-FLOP, J-K/R-S, CLOCKED, MASTER SLAVE AND 1 FLIP-FLOP, PULSE TRIGGERED |
| BODY WIDTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM IN |
| BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM IN |
| FEATURES PROVIDED | MONOLITHIC AND HERMETICALLY SEALED AND AC COUPLED AND MEDIUM SPEED AND MEDIUM POWER AND POSITIVE OUTPUTS AND W/CLEAR AND NEGATIVE EDGE TRIGGERED AND EDGE TRIGGERED |
| INCLOSURE CONFIGURATION | FLAT PACK |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-86 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |