The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN, body_height: 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM IN, body_length: 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM IN, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC AND GLASS, storage_temp_range: -65.0 TO 150.0 CELSIUS DEGC. This product is currently in active production with full OEM support.
This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-067-3072, indicating validated use in U.S. government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels.
Verify compatibility with your specific system configuration before ordering.
| body_width | 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM IN |
| body_height | 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM IN |
| body_length | 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM IN |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC AND GLASS |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | 6 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| case_outline_source_and_designator | -0-001-AG JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| NSN | 5962-01-067-3072 |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS DEGC |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND W/STORAGE AND PROGRAMMABLE AND PROGRAMMED AND SCHOTTKY AND EXPANDABLE AND HIGH SPEED AND W/DECODED OUTPUT AND W/OPEN COLLECTOR AND W/ENABLE AND BIPOLAR |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS DEGC |
| TEST DATA DOCUMENT | 96214-2031648 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| CASE OUTLINE SOURCE AND DESIGNATOR | -0-001-AG JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| BODY LENGTH | 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM IN |
| BODY HEIGHT | 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM IN |
| INPUT CIRCUIT PATTERN | 6 INPUT |