The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN, body_height: 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM IN, body_length: 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN, features_provided: MONOLITHIC AND POSITIVE OUTPUTS AND W/TOTEM POLE OUTPUT, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, precious_material: SILVER. This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-00-272-9506, indicating validated use in U.S.
government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels. Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN |
| body_height | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM IN |
| body_length | 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN |
| features_provided | MONOLITHIC AND POSITIVE OUTPUTS AND W/TOTEM POLE OUTPUT |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| precious_material | SILVER |
| inclosure_material | PLASTIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | +0.0 TO 70.0 CELSIUS DEGC |
| input_circuit_pattern | TRIPLE 3 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| design_function_and_quantity | 3 GATE, NOR |
| NSN | 5962-00-272-9506 |
| DESIGN FUNCTION AND QUANTITY | 3 GATE, NOR |
| BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM IN |
| INCLOSURE MATERIAL | PLASTIC |
| BODY WIDTH | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN |
| FEATURES PROVIDED | MONOLITHIC AND POSITIVE OUTPUTS AND W/TOTEM POLE OUTPUT |
| MAXIMUM POWER DISSIPATION RATING | 180.0 MILLIWATTS |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| TIME RATING PER CHACTERISTIC | 27.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 24.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| INPUT CIRCUIT PATTERN | TRIPLE 3 INPUT |