The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN, body_height: 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM IN, body_length: 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN, features_provided: MONOLITHIC AND POSITIVE OUTPUTS AND W/TOTEM POLE OUTPUT, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, precious_material: SILVER. This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-00-865-4626, indicating validated use in U.S.
government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels. Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM IN |
| body_height | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM IN |
| body_length | 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM IN |
| features_provided | MONOLITHIC AND POSITIVE OUTPUTS AND W/TOTEM POLE OUTPUT |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| precious_material | SILVER |
| inclosure_material | PLASTIC |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | +0.0 TO 70.0 CELSIUS DEGC |
| input_circuit_pattern | TRIPLE 3 INPUT |
| inclosure_configuration | DUAL-IN-LINE |
| terminal_surface_treatment | SILVER |
| NSN | 5962-00-865-4626 |
| INPUT CIRCUIT PATTERN | TRIPLE 3 INPUT |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| PRECIOUS MATERIAL | SILVER |
| MAXIMUM POWER DISSIPATION RATING | 120.0 MILLIWATTS |
| FEATURES PROVIDED | MONOLITHIC AND POSITIVE OUTPUTS AND W/TOTEM POLE OUTPUT |
| OPERATING TEMP RANGE | +0.0 TO 70.0 CELSIUS DEGC |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |
| TIME RATING PER CHACTERISTIC | 22.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT NS |
| DESIGN FUNCTION AND QUANTITY | 3 GATE, NAND |