The MICROCIRCUIT,DIGITAL is a the manufacturer industrial component. Key specifications include body_width: 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN, body_height: 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN, body_length: 0.785 INCHES MAXIMUM IN, features_provided: HERMETICALLY SEALED AND MONOLITHIC AND SCHOTTKY AND W/OPEN COLLECTOR, output_logic_form: TRANSISTOR-TRANSISTOR LOGIC, inclosure_material: CERAMIC AND GLASS. This part is cataloged in the Federal Logistics Information System (FLIS) under NSN 5962-01-150-5648, indicating validated use in U.S.
government and defense logistics supply chains. Available through authorized enterprise resellers and TPM (Third Party Maintenance) channels. Verify compatibility with your specific system configuration before ordering.
| body_width | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| body_height | 0.140 INCHES MINIMUM AND 0.185 INCHES MAXIMUM IN |
| body_length | 0.785 INCHES MAXIMUM IN |
| features_provided | HERMETICALLY SEALED AND MONOLITHIC AND SCHOTTKY AND W/OPEN COLLECTOR |
| output_logic_form | TRANSISTOR-TRANSISTOR LOGIC |
| inclosure_material | CERAMIC AND GLASS |
| storage_temp_range | -65.0 TO 150.0 CELSIUS DEGC |
| operating_temp_range | -55.0 TO 125.0 CELSIUS DEGC |
| input_circuit_pattern | QUAD 2 INPUT |
| end_item_identification | PREPROVISIONING SUPPORT NAVICP IS POE |
| inclosure_configuration | DUAL-IN-LINE |
| terminal_surface_treatment | SOLDER |
| NSN | 5962-01-150-5648 |
| TEST DATA DOCUMENT | 81349-MIL-M-38510 SPECIFICATION (INCLUDES ENGINEERING TYPE BULLETINS, BROCHURES,ETC., THAT REFLECT SPECIFICATION TYPE DATA IN SPECIFICATION FORMAT; EXCLUDES COMMERCIAL CATALOGS, INDUSTRY DIRECTORIES, AND SIMILAR TRADE PUBLICATIONS, REFLECTING GENERAL TYPE DATA ON CERTAIN ENVIRONMENTAL AND PERFORMANCE REQUIREMENTS AND TEST CONDITIONS THAT ARE SHOWN AS "TYPICAL", "AVERAGE", "NOMINAL", ETC.). |
| BODY WIDTH | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM IN |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND SCHOTTKY AND W/OPEN COLLECTOR |
| TERMINAL SURFACE TREATMENT | SOLDER |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS DEGC |
| CASE OUTLINE SOURCE AND DESIGNATOR | D-1 MIL-M-38510 |